Argumenty su
http://ftp.digital.com/pub/Digital/info/semiconductor/literature/164pcpb.pdf
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http://www.cpuid.com/reviews/K8/index.php
21164PC 2x int,2 x fpu, Fatch decode and branch unit
We can mention :
* 3 x86 decoding units
* 3 integer units (ALU)
* 3 floating point units (FPU)
* A 128KB L1 cache
AMD sefvyvojari
Senior Team Members
AMD SENIOR FELLOW, Former Chief Engineer of PowerPC 601 and Power4:
I came to AMD after spending two years doing research into technology scalable computer architecture at UT-Austin. Prior to that, I was a distinguished engineer at IBM in Austin where I was the chief engineer on the Power4 chip. For me, AMD represents a dedicated team of people committed to bringing the right "common sense" products to market. The technology developed at AMD is clearly some of the best in the industry, and I believe that AMD will grow rapidly because of this. I am leading a next generation design, and look forward to extending this lead.
AMD CORPORATE FELLOW, Former IBM Fellow, and Chief Architect of Power, PowerPC, xSeries 440,445, and CTO of Newisys:
I came to AMD after 5 years at Newisys building enterprise class Opteron based servers and scalable Opteron servers and 30 years at IBM - mostly at Watson Research - working on many architecture innovations from the 801 (first RISC machine) to the large scale scalable x86 systems. I was appointed and IBM Fellow in 1994. I view AMD as the next logical step in my career, where I now have the opportunity to help set the direction for future of industry standard servers as AMD takes Opteron to the next level. I have found my job and AMD to be a very exciting place to work, full of very talented people, all of us working to change the server landscape.
AMD FELLOW, Former Chief Architect of UltraSparc III:
After leading the UltraSparc III architecture for seven years I spent a couple of years in Sun Laboratories working on the system architecture for a DARPA Peta-scale supercomputer. I was attracted to AMD by their bold move in defining the AMD64 instruction set and then delivering an impressive implementation of the ISA in the form of the Opteron processors. When I talked to the impressive team of talent that AMD assembled to design their processors I was convinced that this was a team I had to be part of and that would change the future of microprocessors.
AMD CORPORATE FELLOW, Former Lead Architect of Alpha Architecture:
Alchemy, the startup where I was CTO, was acquired by AMD in Feb, 2002. Previously, I had major technical roles on development of VAX, Alpha, ARM architectures and microprocessors. I am currently leading mobile systems team for AMD and am excited about the future generations of mobile design where AMD can bring real value and battery life leadership to Windows based mobile systems. For me the AMD vision of providing value to the customer, which is what the customer wants and needs, versus the "current trend of the year" is very rewarding. The MTS technical ladder at AMD goes up to Corporate Fellow which is the equiv. of a Corp VP. This shows that AMD values and rewards Sr. technical contributors without having to branch into management.
http://www2.amd.com/us-en/Corporate/Careers/1,,51_82_13175_13439%5e13184,00.html
Dirk Meyer
President and Chief Operating Officer
Prior to AMD, Meyer spent nearly a decade at Digital Equipment Corporation, where he was co-architect of the Alpha 21064 and 21264 microprocessors. In addition to his tenures at AMD and Digital, Meyer has also worked for Intel Corporation and has been involved in the design of x86, Alpha™, VAX, and embedded processors.
Meyer joined AMD in 1995 and in 1996 was promoted to director of engineering for the AMD Athlon™ microprocessor development program in Austin, Texas
http://www.amd.com/us-en/Corporate/AboutAMD/0,,51_52_570_11573,00.html
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